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Zhang honored twice at the ACM FPGA Symposium
Professor Zhiru Zhang has received a pair of honors from the Association for Computing Machinery’s (ACM) Special Interest Group on Design Automation (SIGDA).
Zhang received the Best Paper Award at ACM/SIGDA’s 30th International Symposium on Field-Programmable Gate Arrays (FPGA 2022) for the work titled “RapidStream: Parallel Physical Implementation of FPGA HLS Designs.” The research was published in collaboration with Professor Jason Cong's group at UCLA, AMD Xilinx, and Ghent University. RapidStream shortens FPGA compile time by nearly an order of magnitude through integrating high-level synthesis (HLS) pipelining and physical implementation and enabling parallel compilation.
FPGA is an annual conference focused on advances in field-programmable gate array technology. Researchers present work describing effective design techniques and design flows integrating expert practical and research knowledge related to FPGAs for a broader audience.
Zhang has also been recognized by the ACM/SIGDA Technical Committee on FPGAs and Reconfigurable Computing, electing his DAC'06 paper titled “An Efficient and Versatile Scheduling Algorithm Based on SDC Formulation” to their Hall of Fame.
This paper was inducted into the HOF Class of 2022 for being “one of the milestones in the development of high-level synthesis used heavily in industry and academia.” Many commercial and academic high-level synthesis (HLS) tools, including Vivado HLS, are built on the scheduling algorithm proposed in Zhang’s paper.
The TCFPGA Hall of Fame for FPGAs and Reconfigurable Computing recognizes the most significant peer-reviewed publications in the field, highlights key contributions, and represents the body of knowledge that has accumulated over the past 30 years. The ACM SIGDA Technical Committee on FPGAs and Reconfigurable Computing is a technical committee of the Design Automation Special Interest Group, which was formed to promote the FPGA and reconfigurable computing community. Any technical publications on FPGAs and Reconfigurable Computing from any journal or conference publications in the past are eligible for this distinction, and each year, 2-3 papers are inducted.