Alyssa Apsel received the B.S. from Swarthmore College, Swarthmore, PA, in 1995 and the Ph.D. from Johns Hopkins University, Baltimore, MD, in 2002. She joined Cornell University in 2002, where she is currently an Associate Professor of Electrical and Computer Engineering. The focus of her research is on power-aware mixed signal circuits and solving the problems that arise in highly scaled CMOS and modern electronic systems. She has authored or coauthored over 75 refereed publications in related fields of RF mixed signal circuit design, interconnect design and planning, photonic integration with VLSI, and circuit design techniques in the presence of variation resulting in five patents and several pending patent applications.
As IC applications have multiplied over the past decade, pushing CMOS electronics beyond the PC and into everything from greeting cards to the human body, so have problems associated with nano-scale high performance CMOS. The quest for improved performance, previously masked by the progression of Moore's law, now calls for renewed creativity and the development of fundamentally new approaches to circuit and architecture design. In our group, we consider how the progression of CMOS digital electronics and devices optimized for digital performance has affected mixed signal circuit design. We conduct research investigating new approaches to cost effective design that leverage today's technology but achieve improved performance per unit power. We look at how problems resulting from device scaling such as process variation, noise, and reduced analog performance can be addressed with skillful analog and mixed signal design.
- 2016."A Fully Integrated Software-Defined FDD Transceiver Tunable from 0.3-to-1.6 GHz."Paper presented at IEEE RFIC Symposium. Nominated for best paper award, June. .
- 2016."Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O."IEEE Transactions on Very Large Scale Integration (VLSI) Systems24(3): 1050-1058. .
- 2016."A Wireless FSCV Monitoring IC With Analog Background Subtraction and UWB Telemetry.."IEEE Transactions on Biomedical Circuits and Systems10(2): 289-299. .
- 2016.""Broadly Tunable Frequency Division Duplex Transceiver: Theory and Operation"."Paper presented at IEEE ICECS, Monte Carlo, December, .
- 2016.""0.89 mW On-Chip Jitter-Measurement Circuit for High Speed Clock with Sub-Picosecond Resolution"."Paper presented at IEEE ESSDERC/ESSCIRC, Lucerne, Switzerland, September. .
Selected Awards and Honors
- ISLPED Design Contest, second place2010
- Best Student Paper(IEEE Midwest Symposium on Circuits and Systems)2000
- Abel Wolman Fellowship(Johns Hopkins University)1997
- Caltech Institute Fellowship(California Institute of Technology)1995
- Best Student Paper(Philadelphia Section IEEE Student Paper Contest)1995
- BS(Electrical Engineering),Swarthmore College,1995
- MS(Electrical Engineering),California Institute of Technology,1996
- Ph D(Electrical Engineering),Johns Hopkins University,2002